Kalray MPPA256 experiments

As part of a larger collaborative programme between Inria and this company, new experimental machines equipped with Kalray MPPA256 manycore processor were provided to a small number of Inria teams. The processor itself consists of 16 processing clusters, each itself a 16-core processor (hence 256 cores altogether), The clusters are connected by an on-chip network, and the whole architecture (driven by a host, out-of-chip main CPU) may be programmed according to several computation models, some quite close from the MoCCs considered in our researches.

Part of this 10-month contract was meant to fund two internships, in our case on:

Astrium/CNES PostDoc

Astrium Space Transportation (now part of Airbus Defence and Space) asked us if we could provide automatic methods for the design and implementation of embedded software and system/network configuration in an aerospace context. The objective is to reduce the design and validation costs (especially in case of system evolutions), while preserving an assurance level superior to that of the Ariane 5 flight program. We are exploring automation of the real-time allocation, scheduling, and code generation using the novel algorithms developed and implemented in the Lopht tool.

The post-doctoral position of Raul Gorcitz was funded on this contract.

Kontron CIFRE

This contract provides us means to partially support the PhD thesis of Mohamed Bergach (which is physically most of the time at Kontron Toulon). The topic is to study how to efficiently implement various sizes of the FFT (Fast Fourier Transform) algorithm on multicore and GP-GPU architectures from the range of processors used at Kontron, in order to understand in a second phase how to best allocate several such algorithms in parallel, as part of a single application, in the most efficient way (regarding performance but also power consumption and thermal constraints).